The W9425G6KH is a 256M DDR SDRAM and speed involving -4/-5/-5I/-5A.
Up to 250 MHz Clock Frequency
Double Data Rate architecture, two data transfers per clock cycle
Differential clock inputs (CLK and /CLK)
DQS is edge-aligned with data for Read, center-aligned with data for Write
CAS Latency: 2, 2.5, and 3
Burst Length: 2, 4 and 8
Auto Refresh and Self Refresh
Precharged Power Down and Active Power Down
Write Data Mask
Write Latency = 1
7.8μS refresh interval (8K/64 mS refresh)
Maximum burst refresh cycle: 8
Interface: SSTL_2
属性 | 数值 |
---|---|
存储器大小 | 256Mbit |
SDRAM类 | DDR |
组织 | 32M x 8 bit |
数据速率 | 200MHz |
数据总线宽度 | 16Bit |
位址总线宽 | 15Bit |
每字组的位元数目 | 8Bit |
最长随机存取时间 | 55ns |
字组数目 | 32M |
安装类型 | 贴片 |
封装类型 | TSOP |
引脚数目 | 66 |
尺寸 | 22.35 x 10.29 x 1.05mm |
高度 | 1.05mm |
长度 | 22.35mm |